Explore projects

CVA6 SDK containing RISC-V tools and Buildroot

CV32E40S Design-Verification environment

RISC-V eXtension interface that provides a generalized framework suitable to implement custom coprocessors and ISA extensions

Linux kernel source tree

Advanced Verification Methodologies for RISC-V and related IP

The CORE-V CVE2 is a small 32 bit RISC-V CPU core (RV32IMC/EMC) with a two stage pipeline, based on the original zero-riscy work from ETH Zurich and Ibex work from lowRISC.

Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.

This is the CORE-V MCU DevKit project, hosting the open-source artifacts for the CORE-V MCU Development Kit.

Example SDK applications for DevKit

CV32E40X Design-Verification environment

This is the CORE-V MCU project, hosting CORE-V's embedded-class cores.

Issues related to the OpenHW Group infra (GtHub, Mattermost, ...)

Main Repo for the OpenHW Group Software Task Group

CORE-V MCU DevKit drivers written with AWS CommonIO approach

Eclipse/FreeRTOS/core-v-mcu example program

Instruction Set Generator initially contributed by Futurewei